Serdar Tasiran
A Compositional Method for Verifying Software Transactional Memory Implementations
Presentation given at Microsoft Research

Tayfun Elmas, Shaz Qadeer, Serdar Tasiran
Goldilocks: A Race- and Transaction-Aware Java Runtime
ACM SIGPLAN 2007 Conf. on Programming Language Design and Implementation,
PLDI '07. June 10-13, 2007.

Serdar Tasiran, Tayfun Elmas
Rollback Atomicity
7th Workshop on Runtime Verification (RV 2007)
6th International Conference on Aspect-Oriented Software Development Conference (AOSD 2007)
Vancouver, BC, Canada, March 2007

Serdar Tasiran, Alper Demir
Stochastic Logical Effort and Smart Monte Carlo for Timing Yield Estimation and Optimization
ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU)
San Jose, CA, Februrary 2006.

Soner Yaldiz, Alper Demir, Serdar Tasiran, Paolo Ienne, Yusuf Leblebici
Characterizing and Exploiting Task-Load Variability and Correlation for Energy Management for
Multi-Core Systems
IEEE 2005 3rd Workshop on Embedded Systems for Real-Time Multimedia
New York Metropolitan Area, USA. September 22-23, 2005

Serdar Tasiran, Tayfun Elmas, Guven Bolukbasi, M. Erkan Keremoglu
A Novel Test Coverage Metric for Concurrently-Accessed Software Components
Fifth International Workshop on Formal Approaches to Testing of Software (FATES 2005).
University of Edinburgh, Scotland, UK, July 11, 2005

Tayfun Elmas, Serdar Tasiran
VyrdMC: Driving Runtime Refinement Checking with Model Checkers
Fifth Workshop on Runtime Verification (RV'05).
The University of Edinburgh, Scotland, UK. July 12, 2005.

Tayfun Elmas, Serdar Tasiran
Koşutzamanlı Yazılım Bileşenleri için Bir Otomatik Doğrulama Çerçevesi: VyrdMC
2nd  National Software Engineering Symposium.
METU, Ankara, Turkey, September 22-24, 2005.

Serdar Tasiran
A Framework for Runtime Verification of Concurrent Programs
Presentation given at Microsoft Research (available on the Research Channel) June 29, 2005

Tayfun Elmas, Serdar Tasiran, Shaz Qadeer
VYRD: VerifYing Concurrent Programs by Runtime Refinement-Violation Detection
ACM SIGPLAN 2005 Conference on Programming Language Design and Implementation, PLDI '05.
June 12-15, 2005.

Serdar Tasiran
Runtime Refinement Checking for Concurrent Data Structures (the VYRD* Project: VerifYing Refinement by Runtime Detection)
Presentation given at Microsoft Research (available on the Research Channel) August 30, 2004

Serdar Tasiran, Shaz Qadeer
Runtime Refinement Checking of Concurrent Data Structures
In Proc. RV'04 - Fourth Workshop on Runtime Verification, April 3, 2004, Barcelona, Spain
The European Joint Conferences on Theory and Practice of Software (ETAPS '04)

S. Taşıran, B. Batson, Y. Yu
Using a Formal Specification and a Model Checker to Monitor and Direct Simulation:
Verifying the Multiprocessing Hardware of the Alpha 21364 Microprocessor.
In Proc. IEEE 40^th Design Automation Conference, DAC '03, Anaheim, CA, June 2003.
(Invited talk to ISSCC 2004, “Highlights of DAC” Session)

T. Munzner, F. Guimbretiere, S. Taşıran, L. Zhang, and Y. Zhou
TreeJuxtaposer: Scalable Tree Comparison using Focus+Context with Guaranteed Visibility
In Proc. of the 30th Int'l Conf. on Computer Graphics and Interactive Techniques (SIGGRAPH '03), San Diego, California, USA
ACM Transacations on Graphics, 22(3):453-462, 2003

S. Taşıran, Y. Yu, R. Joshi, B. Batson, S. Kreider
Using Formal Specifications to Monitor and Guide Simulation:
Verifying the Cache Coherence Engine of the Alpha 21364 Microprocessor.
IEEE Workshop on Microprocessor Test and Verification, MTV '02, Austin, TX, 2002. 

S. Qadeer, S. Taşıran
Promising Directions in Hardware Design Verification.
In Proc. Intl. Symposium on Quality Electronic Design, ISQED '02, San Jose, CA, 2002. 

S. Taşıran, F. Fallah, D. G. Chinnery, S. J. Weber, K. Keutzer
A Functional Validation Technique: Biased Random Simulation Guided By Observability-Based Coverage.
In Proc. of the IEEE Intl Conf. on Computer Design: VLSI in Computers & Processors, ICCD ‘01, pp. 82-88.

D. Dill, S. Taşıran
Simulation Meets Formal Verification.
Embedded tutorial in the IEEE Intl Conf. on Computer-Aided Design, ICCAD 1999, San Jose, CA, 1999

S. Taşıran, S. Yovine, R. K. Brayton
A Timed Automaton-Based Method for Accurate Computation of Circuit Delay in the Presence of Cross-Talk.
In Proc. of the 2^nd Intl. Conf. on Formal Methods in Computer-aided Design, FMCAD '98, LNCS 1522, Palo Alto, CA, 1998, pp. 149-166

An Informal Introduction to Formal Methods for Hardware and Software Design and Verification
Engineering Seminar, Koc University